This invention relates generally to dedicated systolic processing arrays, and more particularly the invention relates to a pipelined digital filter processor employing moving coefficients.
The digital filter processor (DFP), also referred to as a finite impulse response (FIR) processor or convolver, forms vector operations in the form of ##EQU1## where X.sub.n-i --input samples
Y.sub.n --output filtered signal PA1 c.sub.i --filter coefficients PA1 k--filter length, number of taps
A number of DFP integrated circuits are commercially available. Typically, sampled data is fed sequentially to multipliers having fixed coefficients, and the partial products are then summed and outputed.